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arXiv:2503.11654cs.AR

Enhanced LPDDR4X PHY in 12 nm FinFET

Johannes Feldmann, Jan Lappas, Mohammadreza Esmaeilpour, Hussien Abdo, Christian Weis, Norbert Wehn

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Abstract

The demand for memory technologies with high bandwidth, low power consumption, and enhanced reliability has led to the emergence of LPDDR4X DRAM memory. However, power efficiency and reliability depend not only on the memory device but also on its interfacing. To enable advanced monitoring of LPDDR4X DRAM devices and interface tuning, we propose a LPDDR4X PHY implemented in 12 nm FinFET technology. A RISC-V subsystem offers software-controlled DRAM interface access as well as external interfaces to connect additional sensors for monitoring temperature and current consumption of LPDDR4X DRAM devices.

arXiv comments
RISC-V Summit Europe, Munich, 24-28th June 2024
Journal reference
DOI
Subjects
cs.ARHardware Architecture

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