VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool — mentioned by Rochus

Mon, 16 Feb 2026 00:11:28 GMT

Cool. There has also been some effort for coding agents generating hardware descriptions e.g. in Verilog (see e.g. https://arxiv.org/html/2408.08927v1). Wonder how good they are today. Also in hardware design we could now switch to intent- and constraint based specifications in semi-formal human specification language and let the LLM write the SystemVerilog with assertions and do the testing.

Paper and discussion history. A mention is not an endorsement.

VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool · HackerPapers discussions

VerilogCoder: Autonomous Verilog Coding Agents with Graph-based Planning and Abstract Syntax Tree (AST)-based Waveform Tracing Tool — mentioned by Rochus