<?xml version="1.0" encoding="UTF-8"?>
<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices · HackerPapers discussions</title><link>https://hackerpaper.kaipfister.de/p/2303.15375/</link><description>Collected HN comments and submissions linking this paper.</description><language>en</language><lastBuildDate>Mon, 02 Nov 2026 11:16:22 GMT</lastBuildDate><atom:link href="https://hackerpaper.kaipfister.de/p/2303.15375/feed.xml" rel="self" type="application/rss+xml" /><item><title>Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices — mentioned by riehwvfbk</title><link>https://news.ycombinator.com/item?id=39731476</link><guid isPermaLink="false">urn:hackerpapers:mention:2303.15375:39731476</guid><pubDate>Sun, 17 Mar 2024 02:43:56 GMT</pubDate><description>&lt;p&gt;That doesn&amp;#x27;t match my intuition about CXL memory. It&amp;#x27;s latency AFAIK is more similar to accessing NUMA memory on another socket (and applications are OK with blocking on that) than an SSD. So quite a bit faster. Actual measurements seem to support this: https://arxiv.org/pdf/2303.15375.pdf (see Figure 3)&lt;/p&gt;&lt;p&gt;&lt;a href="https://hackerpaper.kaipfister.de/p/2303.15375/"&gt;Paper and discussion history&lt;/a&gt;. A mention is not an endorsement.&lt;/p&gt;</description><category>cs.PF</category></item><item><title>Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices — mentioned by eternalban</title><link>https://news.ycombinator.com/item?id=35484647</link><guid isPermaLink="false">urn:hackerpapers:mention:2303.15375:35484647</guid><pubDate>Fri, 07 Apr 2023 17:54:26 GMT</pubDate><description>&lt;p&gt;Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices, 2023 https://ar5iv.labs.arxiv.org/html/2303.15375 In this work, we explore CXL memory’s performance characterization on a state-of-the-art experimental platform. First, we study the basic performance characteristics of CXL memory using our proposed microbenchmark. Based on our observations and comparisons to standard DRAM connected to local and remote NUMA nodes, we also study the impact of CXL memory on end-to-end applications with different offloading and interleaving policies. Finally, we provide several guidelines for…&lt;/p&gt;&lt;p&gt;&lt;a href="https://hackerpaper.kaipfister.de/p/2303.15375/"&gt;Paper and discussion history&lt;/a&gt;. A mention is not an endorsement.&lt;/p&gt;</description><category>cs.PF</category></item></channel></rss>
