https://hackerpaper.kaipfister.de/p/2012.11890/Collected HN comments and submissions linking this paper.enMon, 02 Nov 2026 11:16:22 GMThttps://news.ycombinator.com/item?id=49457485urn:hackerpapers:mention:2012.11890:49457485Wed, 26 Aug 2026 23:48:07 GMT<p>I like the idea of a CPU/GPU/TPU on RAM (look at those gorgeous bandwidth numbers!) -- but I also wonder what problems it may potentially bring in the future... I think it would be a good idea that if RAM is to implement processors / PIM on it in the future, that each RAM stick should have an external DIP &quot;safety&quot; switch on the side which switches off such processing. If this switch is flipped by the user, then the stick simply falls back to operating as normal &quot;dumb&quot; RAM, driven by external CPU control. Also, it would be a good idea to have debug ports, debug proxying, single step…</p><p><a href="https://hackerpaper.kaipfister.de/p/2012.11890/">Paper and discussion history</a>. A mention is not an endorsement.</p>cs.ARhttps://news.ycombinator.com/item?id=25543684urn:hackerpapers:submission:2012.11890:25543684Sat, 26 Dec 2020 14:32:11 GMT<p>Simdram: A Framework for Bit-Serial SIMD Processing Using DRAM</p><p></p><p>1 point; 0 discussion replies on HN. <a href="https://hackerpaper.kaipfister.de/p/2012.11890/">Paper and source history</a>. A submission is not an endorsement.</p>cs.AR