PIUMA: Programmable Integrated Unified Memory Architecture · HackerPapers discussions

PIUMA: Programmable Integrated Unified Memory Architecture — mentioned by yvdriess

Wed, 30 Aug 2023 08:34:12 GMT

There's two single threaded cores, but the four multithreaded cores are indeed Tera-style barrel processors. The Tera paper is even cited directly in the PIUMA white paper: https://arxiv.org/abs/2010.06277 edit: s/eight/four

Paper and discussion history. A mention is not an endorsement.

PIUMA: Programmable Integrated Unified Memory Architecture — mentioned by yvdriess

Wed, 16 Aug 2023 13:05:03 GMT

I would not disregard that direction. Architectures that do well on pointer chasing have been attempted in the past (e.g. Cray XMT) and are cropping up in prototypes (PIUMA https://arxiv.org/abs/2010.06277) and startups. The caveat is that latency is hidden with massive amounts of parallelism. edit: To be clear, I agree with the sentiment that the paper abstract machine models are inadequate in most practical cases. There are workloads where you're dealing with asymptotically large datasets, such as genome assembly and analysis. Even there, the RAM model is abstracting away the bottlenecks of…

Paper and discussion history. A mention is not an endorsement.

PIUMA: Programmable Integrated Unified Memory Architecture — HN submission

Thu, 26 Nov 2020 08:19:53 GMT

PIUMA: Programmable Integrated Unified Memory Architecture

36 points; 2 discussion replies on HN. Paper and source history. A submission is not an endorsement.

PIUMA: Programmable Integrated Unified Memory Architecture — HN submission

Thu, 15 Oct 2020 15:29:43 GMT

Piuma: Programmable Integrated Unified Memory Architecture

4 points; 0 discussion replies on HN. Paper and source history. A submission is not an endorsement.