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arXiv:2004.04509cs.AR

A Survey on Coarse-Grained Reconfigurable Architectures from a Performance Perspective

Artur Podobas, Kentaro Sano, Satoshi Matsuoka

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Abstract

With the end of both Dennard's scaling and Moore's law, computer users and researchers are aggressively exploring alternative forms of computing in order to continue the performance scaling that we have come to enjoy. Among the more salient and practical of the post-Moore alternatives are reconfigurable systems, with Coarse-Grained Reconfigurable Architectures (CGRAs) seemingly capable of striking a balance between performance and programmability. In this paper, we survey the landscape of CGRAs. We summarize nearly three decades of literature on the subject, with a particular focus on the premise behind the different CGRAs and how they have evolved. Next, we compile metrics of available CGRAs and analyze their performance properties in order to understand and discover knowledge gaps and opportunities for future CGRA research specialized towards High-Performance Computing (HPC). We find that there are ample opportunities for future research on CGRAs, in particular with respect to size, functionality, support for parallel programming models, and to evaluate more complex applications.

arXiv comments
Journal reference
IEEE Access, 2020 (https://ieeexplore.ieee.org/document/9149601)
DOI
doi:10.1109/ACCESS.2020.3012084
Subjects
cs.ARHardware Architecture

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Linked by 1 identifiable commenter in 1 comment across 1 thread, from Jun 2022 to Jun 2022. Found in 1 HN submission from Apr 2020 to Apr 2020. Open submission discussions.

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  1. Build your own FPGA (2012) 1 comment
    • Course-Grained Reconfigurable Architecture [1], like an FPGA but with more robust logic units. Something I'd like to learn more about. [1]: https://arxiv.org/abs/2004.04509

      rpmullerView on HNParent context

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