Achieving Multi-Port Memory Performance on Single-Port Memory with Coding Techniques — mentioned by nsteel

Thu, 16 Apr 2026 10:36:42 GMT

It's similar to RAID schemes but instead of drive failure it's port unavailability. There's a reference at [1] or an FPGA-centric one at [2], but it applies to anywhere where dual/single-port rams are readily available but anything more exotic isn't. [1] Achieving Multi-Port Memory Performance on Single-Port Memory with Coding Techniques - https://arxiv.org/abs/2001.09599 [2] https://people.csail.mit.edu/ml/pubs/fpga12_xor.pdf

Paper and discussion history. A mention is not an endorsement.

Achieving Multi-Port Memory Performance on Single-Port Memory with Coding Techniques · HackerPapers discussions

Achieving Multi-Port Memory Performance on Single-Port Memory with Coding Techniques — mentioned by nsteel