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<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>SIMD Vectorization for the Lennard-Jones Potential with AVX2 and AVX-512 instructions · HackerPapers discussions</title><link>https://hackerpaper.kaipfister.de/p/1806.05713/</link><description>Collected HN comments and submissions linking this paper.</description><language>en</language><lastBuildDate>Mon, 02 Nov 2026 11:16:22 GMT</lastBuildDate><atom:link href="https://hackerpaper.kaipfister.de/p/1806.05713/feed.xml" rel="self" type="application/rss+xml" /><item><title>SIMD Vectorization for the Lennard-Jones Potential with AVX2 and AVX-512 instructions — mentioned by thesz</title><link>https://news.ycombinator.com/item?id=22503361</link><guid isPermaLink="false">urn:hackerpapers:mention:1806.05713:22503361</guid><pubDate>Fri, 06 Mar 2020 13:31:20 GMT</pubDate><description>&lt;p&gt;AVX512 benefits are coming from gather-scatter instructions, I think. What is interesting here is that in their current implementation they aren&amp;#x27;t very beneficial [1] and [2]. [1] https://arxiv.org/pdf/1806.05713.pdf [2] https://www.sciencedirect.com/topics/computer-science/scatte... (recommends these instructions to be used outside of main loop) I remember vaguely that first implementations of scatter/gather instructions were not faster than sequential access from different memory registers. And, thusly, it may come handly that AMD has much bigger core count because each thread will have…&lt;/p&gt;&lt;p&gt;&lt;a href="https://hackerpaper.kaipfister.de/p/1806.05713/"&gt;Paper and discussion history&lt;/a&gt;. A mention is not an endorsement.&lt;/p&gt;</description><category>cs.MS</category></item></channel></rss>
