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<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>High-performance sparse matrix-matrix products on Intel KNL and multicore architectures · HackerPapers discussions</title><link>https://hackerpaper.kaipfister.de/p/1804.01698/</link><description>Collected HN comments and submissions linking this paper.</description><language>en</language><lastBuildDate>Mon, 02 Nov 2026 11:16:22 GMT</lastBuildDate><atom:link href="https://hackerpaper.kaipfister.de/p/1804.01698/feed.xml" rel="self" type="application/rss+xml" /><item><title>High-performance sparse matrix-matrix products on Intel KNL and multicore architectures — mentioned by hadibrais</title><link>https://news.ycombinator.com/item?id=17168403</link><guid isPermaLink="false">urn:hackerpapers:mention:1804.01698:17168403</guid><pubDate>Sun, 27 May 2018 18:45:12 GMT</pubDate><description>&lt;p&gt;Sparse matrix multiplication is generally considered to be a different problem. Sparse matrices need to be represented differently (See https://en.wikipedia.org/wiki/Sparse_matrix for an introduction). There has been recently a lot of research on how to do sparse matrix multiplication efficiently on manycore architectures. See this 2018 paper for example: https://arxiv.org/pdf/1804.01698.pdf. Note that sparse matrix-vector multiplication is also a different problem.&lt;/p&gt;&lt;p&gt;&lt;a href="https://hackerpaper.kaipfister.de/p/1804.01698/"&gt;Paper and discussion history&lt;/a&gt;. A mention is not an endorsement.&lt;/p&gt;</description><category>cs.DC</category></item></channel></rss>
