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<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Automating the Last-Mile for High Performance Dense Linear Algebra · HackerPapers discussions</title><link>https://hackerpaper.kaipfister.de/p/1611.08035/</link><description>Collected HN comments and submissions linking this paper.</description><language>en</language><lastBuildDate>Mon, 02 Nov 2026 11:16:22 GMT</lastBuildDate><atom:link href="https://hackerpaper.kaipfister.de/p/1611.08035/feed.xml" rel="self" type="application/rss+xml" /><item><title>Automating the Last-Mile for High Performance Dense Linear Algebra — mentioned by mratsim</title><link>https://news.ycombinator.com/item?id=21471977</link><guid isPermaLink="false">urn:hackerpapers:mention:1611.08035:21471977</guid><pubDate>Thu, 07 Nov 2019 10:27:02 GMT</pubDate><description>&lt;p&gt;Yes exactly. Usually you can extract 2x to 4x instruction level parallelism on simple add instructions [1] vs [2] For fused-multiply-add even though the latency is higher the instruction is also slower so its the same. BLIS, OpenBLAS and my code extract 2x parallelism (2 accumulators) at the lowest level because we are restricted by the number of registers and the fact that x86 can only issue 2 FMAs per cycle [3]. Details, we divided the work until we have a small micro matrix C or size MR x NR (input matrix of size MxK and KxN so output of MxN), and then here is are the constraints you have…&lt;/p&gt;&lt;p&gt;&lt;a href="https://hackerpaper.kaipfister.de/p/1611.08035/"&gt;Paper and discussion history&lt;/a&gt;. A mention is not an endorsement.&lt;/p&gt;</description><category>cs.MS</category></item></channel></rss>
