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<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Inferring Fine-grained Control Flow Inside SGX Enclaves with Branch Shadowing · HackerPapers discussions</title><link>https://hackerpaper.kaipfister.de/p/1611.06952/</link><description>Collected HN comments and submissions linking this paper.</description><language>en</language><lastBuildDate>Mon, 02 Nov 2026 11:16:22 GMT</lastBuildDate><atom:link href="https://hackerpaper.kaipfister.de/p/1611.06952/feed.xml" rel="self" type="application/rss+xml" /><item><title>Inferring Fine-grained Control Flow Inside SGX Enclaves with Branch Shadowing — mentioned by pritambaral</title><link>https://news.ycombinator.com/item?id=16073525</link><guid isPermaLink="false">urn:hackerpapers:mention:1611.06952:16073525</guid><pubDate>Thu, 04 Jan 2018 20:00:42 GMT</pubDate><description>&lt;p&gt;Maybe, maybe not. I looked around a bit and found [1]&amp;quot;that the Intel SGX does not clear branch history when switching from enclave mode to non-enclave mode&amp;quot;, which suggests either that the SGX designers were unaware of the dangers of not separating branch prediction between privilege levels, or that Intel intentionally weakened SGX so as to not reveal the similar flaw in their ring0/ring3 separation. 1: https://arxiv.org/abs/1611.06952 (Nov &amp;#x27;16)&lt;/p&gt;&lt;p&gt;&lt;a href="https://hackerpaper.kaipfister.de/p/1611.06952/"&gt;Paper and discussion history&lt;/a&gt;. A mention is not an endorsement.&lt;/p&gt;</description><category>cs.CR</category></item></channel></rss>
