Sub-1-us, Sub-20-nJ Pattern Classification in a Mixed-Signal Circuit Based on Embedded 180-nm Floating-Gate Memory Cell Arrays · HackerPapers discussions

Sub-1-us, Sub-20-nJ Pattern Classification in a Mixed-Signal Circuit Based on Embedded 180-nm Floating-Gate Memory Cell Arrays — mentioned by p1esk

Tue, 11 Apr 2017 18:10:02 GMT

Hi Sean, perhaps you can help us understand the claim that analog hardware SNNs are more energy efficient than analog hardware non-spiking networks (e.g. based on floating gate transistors [1])? Also, in the paper [2], Table 4 is a bit confusing: what is the "traditional hardware" they're referring to? Finally, it's not clear from that paper, or from this "Brainstorm" article, that you actually have a working chip, capable of running Alexnet. Is that so? What is the current status of the actual hardware? [1] https://arxiv.org/abs/1610.02091 [2] https://arxiv.org/abs/1611.05141

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Sub-1-us, Sub-20-nJ Pattern Classification in a Mixed-Signal Circuit Based on Embedded 180-nm Floating-Gate Memory Cell Arrays — mentioned by p1esk

Sat, 18 Feb 2017 03:54:04 GMT

Here is a neural network using analog weights and neurons: https://arxiv.org/abs/1610.02091

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Sub-1-us, Sub-20-nJ Pattern Classification in a Mixed-Signal Circuit Based on Embedded 180-nm Floating-Gate Memory Cell Arrays — mentioned by p1esk

Sun, 12 Feb 2017 21:36:34 GMT

Yes: https://arxiv.org/abs/1610.02091

Paper and discussion history. A mention is not an endorsement.