An Empirical Study of Intel Xeon Phi — mentioned by Jweb_Guru

Fri, 09 Sep 2016 05:40:45 GMT

As far as I know, the Phi doesn't actually require NUMA-awareness at all (at least, the older models didn't; see https://arxiv.org/pdf/1310.5842v2.pdf). A Phi lives on a single socket with a coherent L2 cache, and remote L2 accesses are not much slower than main memory ones, nor does core distance along the interconnect seem to affect access time. The new models with lots of main memory are going to be used with six-DIMM slot DDR4 sockets (64 GB each of DDR4, in addition to 16 GB MCDRAM to get even more absurd bandwidth for pure FLOPS / benchmark / coprocessing workfloads; see…

Paper and discussion history. A mention is not an endorsement.

An Empirical Study of Intel Xeon Phi · HackerPapers discussions

An Empirical Study of Intel Xeon Phi — mentioned by Jweb_Guru