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<rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Efficient Synchronization Primitives for GPUs · HackerPapers discussions</title><link>https://hackerpaper.kaipfister.de/p/1110.4623/</link><description>Collected HN comments and submissions linking this paper.</description><language>en</language><lastBuildDate>Mon, 02 Nov 2026 11:16:22 GMT</lastBuildDate><atom:link href="https://hackerpaper.kaipfister.de/p/1110.4623/feed.xml" rel="self" type="application/rss+xml" /><item><title>Efficient Synchronization Primitives for GPUs — mentioned by arghwhat</title><link>https://news.ycombinator.com/item?id=16977894</link><guid isPermaLink="false">urn:hackerpapers:mention:1110.4623:16977894</guid><pubDate>Wed, 02 May 2018 15:32:18 GMT</pubDate><description>&lt;p&gt;Rant time. &amp;gt; &amp;quot;Legacy&amp;quot; code in this context is code that was written in the past and is not going to be updated or rewritten. In that case, I would not say Legacy code is sequential. For the past few decades, SMP has been the target where sensible/possible. &amp;gt; At a fine-grained level, our compilers vectorize (i.e. parallelize) our code. Vectorization is a hardware optimization designed for a very specific use-case: Performing instruction f N times on a buffer of f_input x N, by replacing N instantiations of f by a single fN instance. If this is parallelization, then an Intel Skylake processor…&lt;/p&gt;&lt;p&gt;&lt;a href="https://hackerpaper.kaipfister.de/p/1110.4623/"&gt;Paper and discussion history&lt;/a&gt;. A mention is not an endorsement.&lt;/p&gt;</description><category>cs.OS</category></item></channel></rss>
